1. Field of the Invention
The present invention relates to a non-volatile memory element; and more particularly, to non-volatile memory element for programmable logic applications.
2. Description of Prior Art
A typical Field Programmable Gate Array (FPGA) includes arrays of logic elements and programmable interconnects. Each programmable interconnect serves to selectively connect logic elements. Accordingly, by programming the programmable interconnects, different logic functions are established.
Usually, a programmable interconnect in an FPGA includes a switching transistor programmed to an open or closed state by a corresponding SRAM memory cell. Based on the programmed state, the switching transistor makes or breaks an electrical connection between logic elements. Storing a logic "1" in an SRAM memory cell, for example, causes the corresponding switching transistor to conduct and electrically connect the logic elements connected to the switching transistor. Unfortunately, once configured, the SRAM memory cells require a constant power supply to maintain the programmed state.
U.S. Pat. No. 5,633,518 discloses a non-volatile programmable interconnect for FPGAs. The non-volatile programmable interconnect of this patent closely integrates the switching transistor with a non-volatile memory element for reducing the area of the FPGA, but substantially complicates the design and chip layout. In this design, the switching transistor and the memory element share a floating gate. Unfortunately, during operation, the switching transistor can inject carriers into the floating gate, and change the programmed state of the programmable interconnect.